Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, today said IDT (Integrated Device Technology, Inc.), a leading provider of mixed signal semiconductor solutions that enable the digital media experience, was able to quickly deliver an IDT PanelPort(TM) device, an innovative DisplayPort-compatible digital display receiver and timing controller device, in part due to the novel use of Cadence® Conformal® Constraint Designer as a SDC constraint signoff tool. By using Encounter Conformal Constraint Designer for sign-off, IDT was able to improve the quality of the design, avoid costly design iterations and accelerate time to market for this key product.
Frequently, semiconductor designers forgo the additional step of signing off design constraints, but in doing so, they risk creating an error that could jeopardize the final chip. Encounter Conformal Constraint Designer automates the generation, validation and refinement of timing constraints used in semiconductor design. By using the Encounter Conformal Constraint Designer technology as a constraint signoff tool, IDT was able to detect, analyze and correct the constraints early in the design phase.
Resources for
ROUND ROCK, Texas (Reuters) – A 
